Noise reducing circuit

ABSTRACT

Predetermined frequency components contained in a luminance signal are extracted by BPF ( 12   a )-( 12   n ), and amplified by limited amplifiers ( 16   a )-( 16   n ). As a result, an addition signal, including a luminance signal component amplified and suppressed and a noise component amplified, is obtained from an adder ( 20   a ). The luminance signal is also supplied through an HPF ( 14 ) and adjusted in level by an amplifier ( 18 ). Therefore, a noise component is obtained from a subtracter ( 20   b ) by subtracting an amplified signal from the addition signal by a subtracter ( 20   b ). A subtracter ( 20   c ) subtracts this noise component from the luminance signal supplied from a delay circuit ( 22   a ), thereby outputting a luminance signal reduced of noise through an output terminal (S 2 ). Because the luminance signal is separated into a plurality of bands by the plurality of BPFs, there is no possibility of saturating in noise component by the limiters, thus fully removing noise.

TECHNICAL FIELD

This invention relates to noise reducing circuits, and more particularlyto a noise reducing circuit adapted to reduce noise contained, forexample, in an FM multiplex signal, a video signal reproduced by VTR, ora pickup-reproduced signal reproduced by a CD or DVD (Digital VideoDisk) player.

BACKGROUND ART

In a conventional noise reducing circuit shown in FIG. 43, when aluminance signal is supplied through a high-pass filter (HFP) 2 andamplified by a limiter amplifier 3, an amplified signal, that is limitedat a predetermined level and the higher as shown in FIG. 44B, isobtained from the limiting amplifier 3. Meanwhile, when a luminancesignal shown in FIG. 44(A) is supplied through an HFP 4 and amplified byan amplifier 5, an amplified signal is obtained that has a maximum levelnearly coincident with a limiting level of the limiter 3. The subtracter6 subtracts an output of the amplifier 5 from an output of the limiteramplifier 3 to attenuate a level thereof, thereby outputting noise asshown in FIG. 44(D) from the subtracter 6. Accordingly, it is possibleto reduce the noise contained in the luminance signal by subtracting thenoise shown in FIG. 4(D) from the luminance signal shown in FIG. 44(A)with using the subtracter 6.

In this prior art, however, if a broad-band luminance signal isinputted, an extraction signal having a luminance signal componentsuperposed with noise is obtained from the HPF 2. There has been aproblem that noise is saturated by the limiter 3 with the result that nosufficient noise can be obtained from the subtracter 6.

Incidentally, there is another example of a noise circuit of this kinddisclosed in Japanese Laying-open Patent Publication No. H2-239778 [H04N5/21, G11P 20/02, H03H 15/00] that has been laid open on Sep. 21, 1990.According to FIG. 1 of this publication, when one or both of twoswitches is turned on, noise fallen on a passband of one or both offilters is supplied to a subtracter to thereby reduce noise from areproduced signal. In such a noise removing filter, however, where anyone of the two switches only is turned on, there arises, similarly tothe above case, a problem that there is a saturation of noise superposedon a signal extracted from a corresponding filter. This problem stillremains even where the both switches are turned on.

DISCLOSURE OF THE INVENTION

Therefore, it is a primary object of this invention to provide a noisereducing circuit that is capable of reducing noise contained in an inputsignal.

A first invention is a noise reducing circuit, comprising: a firstsignal path for receiving an input signal and outputting a noisecomponent contained in the inputted signal; a second signal path forreceiving the inputted signal and outputting the input signal or a firstcorrelating signal correlating to the input signal; and a firstcalculating means for calculating the noise component outputted from thefirst signal path and the input signal or the first correlating signaloutputted from the second signal path, and removing noise; wherein thefirst signal path includes a plurality of bandpass filters forextracting a plurality of first predetermined frequency componentscontained in the input signal, a plurality of limiters for individuallyreceiving outputs of the bandpass filters, and a first creating meansfor creating the noise component based on outputs of the limiters.

A second invention is a noise reducing circuit, comprising a pluralityof bandpass filters for extracting predetermined frequency componentscontained in an input signal; a plurality of amplifiers having a rangein which a gain becomes zero or the slight with respect to an inputlevel and having the predetermined frequency components; and an addingmeans for adding together input signal components contained in outputsof the amplifiers.

In the first invention, the noise component is outputted from the firstsignal path while the input signal or the first correlating signalcorrelating to the input signal is outputted from the second signalpath. The first calculating means calculates the noise component and thefirst correlating signal to reduce the noise. In the first signal path,the bandpass filters divide the input signal into a plurality of bandsto extract the predetermined frequency components. These firstpredetermined frequency components are individually given to thelimiters where they are limited at a level higher than a predeterminedlevel, i.e. the input signal is limited at a level higher than thepredetermined level. The first creating means reduces, for example,input signal components contained in the outputs of the limiters tooutput a noise component.

In the second invention, the input signal is divided by the bandpassfilters into a plurality of bands to extract the predetermined frequencycomponents. These predetermined frequency components are individuallygiven to amplifiers having a range of a gain of zero or the slight. Dueto this, the noise contained in the predetermined frequency componentsis reduced. The outputs of the amplifiers are added together by theadding means, thereby obtaining an input signal reduced of the noise.

According to the first invention, since the input signal is divided bythe bandpass filters into a plurality of bands, the noise contained inthe input signal can be fully reduced without saturating the noisesuperposed on the extracted signal from the bandpass filter by thelimiter.

According to the second invention, since the input signal is dividedinto a plurality of bands by the bandpass filters, it is possible toobtain the input signal fully reduced of the noise without amplificationof the noise by the amplifier.

The above described objects and other objects, features, aspects andadvantages of the present invention will become more apparent from thefollowing detailed description of the present invention when taken inconjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing one embodiment of this invention;

FIG. 2 is a timing chart showing part of operation in the FIG. 1embodiment;

FIG. 3 is a circuit diagram showing a limiter employed in the FIG. 1embodiment;

FIG. 4 is a block diagram showing another embodiment of this invention;

FIG. 5(A) is an illustrative view showing passbands for a plurality ofBPFs used in the FIG. 4 embodiment, while (B) is an illustrative viewshowing delay characteristics of the respective BPFs;

FIG. 6 is a block diagram showing a further embodiment of thisinvention;

FIG. 7 is a block diagram showing still another embodiment of thisinvention;

FIG. 8 is a block diagram showing another embodiment of this invention;

FIG. 9(A) is an illustrative view showing passbands for a plurality ofBPFs used in the FIG. 8 embodiment, while (B) is a graph showing delaycharacteristics of the respective BPFs;

FIG. 10 is a block diagram showing another embodiment of this invention;

FIG. 11 is a block diagram showing a further embodiment of thisinvention;

FIG. 12 is a block diagram showing still another embodiment of thisinvention;

FIG. 13 is a block diagram showing another embodiment of this invention;

FIG. 14 is a block diagram showing still another embodiment of thisinvention;

FIG. 15 is a timing chart showing part of operation in the FIG. 14embodiment;

FIG. 16 is a block diagram showing another embodiment of this invention;

FIG. 17 is a graph showing frequency characteristics of a video signaland noise;

FIG. 18 is a block diagram showing another embodiment of this invention;

FIG. 19 is a circuit diagram showing a level detector used in the FIG.18 embodiment;

FIG. 20 is a circuit diagram showing a limiter used in the FIG. 18embodiment;

FIG. 21 is a circuit diagram showing a gain control circuit used in theFIG. 20 embodiment;

FIG. 22 is a block diagram showing another embodiment of this invention;

FIG. 23 is a block diagram showing another embodiment of this invention;

FIG. 24 is a circuit diagram showing one example of an example of anamplifier used in the FIG. 23 embodiment;

FIG. 25 is a graph showing a characteristic of the FIG. 24 embodiment;

FIG. 26 is a circuit diagram showing another example of an amplifierused in the FIG. 23 embodiment;

FIG. 27 is a block diagram showing another embodiment of this invention;

FIG. 28 is a block diagram showing another embodiment of this invention;

FIG. 29 is a block diagram showing another embodiment of this invention;

FIG. 30 is a block diagram showing a further embodiment of thisinvention;

FIG. 31 is a block diagram showing still another embodiment of thisinvention;

FIG. 32 is a block diagram showing another embodiment of this invention;

FIG. 33 is an illustrative view showing passbands of a plurality of BPFsused in the FIG. 32 embodiment;

FIG. 34 is a graph showing frequency characteristics of a video signaland noise;

FIG. 35 is a block diagram showing another embodiment of the FIG. 1embodiment;

FIG. 36 is an illustrative view showing pass bands of a plurality ofBPFs and LPFs used in the FIG. 35 embodiment;

FIG. 37 is a graph showing frequency characteristics of a video signaland noise;

FIG. 38 is a block diagram showing still another embodiment of thisinvention;

FIG. 39 is a graph showing a characteristic of an amplifier used in theFIG. 38 embodiment;

FIG. 40 is a circuit diagram showing one example of an amplifier used inthe FIG. 38 embodiment;

FIG. 41 is a circuit diagram showing another example of an amplifierused in the FIG. 39 embodiment;

FIG. 42 is a block diagram showing another embodiment of this invention;

FIG. 43 is a block diagram showing a conventional art; and

FIG. 44 is a timing chart showing part of operation in the prior artshown in FIG. 43.

BEST FORM FOR PRACTICING THE INVENTION

Referring to FIG. 1, a noise reducing circuit 10 of this embodimentincludes an input terminal S1 to receive a video signal, i.e., luminancesignal, reproduced by a VTR (not shown) as shown in FIG. 2(A). Thisvideo signal is supplied to a plurality of bandpass filters (BPF) 12a-12 n and a high-pass filter (HPF) 14. The BPFs 12 a-12 n respectivelyextract predetermined frequency components contained in the videosignal, while the HPF 14 extracts a high-range component of the videosignal. The extracted signals extracted by the BPFs 12 a-12 n arerespectively inputted to limiter amplifiers 16 a-16 n where theextracted signals are amplified and the amplified signals are thenlimited at its predetermined level portion or the higher. The limiteramplifiers 16 a-16 n have respective outputs added together by an adder20 a, thereby providing a signal that is amplified in noise componentand suppressed in luminance signal component as shown in FIG. 2(B).

On the other hand, an output of the HPF 14 is amplified by an amplifier18, thereby providing an amplified signal having a maximum level nearlycoincident with a limiting level of the limiter amplifiers 16 a-16 n asshown in FIG. 2(C). The addition signal from the adder 20 a and theamplification signal from an amplifier 18 are supplied to an subtracter20 b where the luminance signal component are removed from the additionsignal shown in FIG. 2(B). The subtracter 20 b outputs a noise componentattenuated in level to a noise component contained in the input signalsupplied through the input terminal S1. The luminance signal inputtedthrough the input terminal S1 is also matched in phase with this noisecomponent by a delay circuit 22 a as a second delay means, and suppliedto a subtracter 20 c. The subtracter 20 c subtracts an output of theadder 20 b from an output of the delay circuit 22 a, with a result thata luminance signal reduced of a noise component as shown in FIG. 2(E) isoutputted through an output terminal S2.

The limiter amplifiers 16 a-16 n are structured as shown in FIG. 3. Thatis, an input terminal S3 is connected through a capacitor C1 andresistor R1 to a base of a transistor forming a differential pair 24.The base of the transistor T1 is connected to a base of a transistor T2through resistors R2 and R3. The resistors R2 and R3 have a connectingpoint connected to a constant-voltage source V1. The transistor T1 has acollector connected to a power supply VCC. A constant-current source 11is connected to a connecting point between an emitter of the transistorT1 and an emitter of the transistor T2. The transistor T2 has acollector connected to the power supply VCC through a resistor R5, andto an output terminal S4 through a capacitor C2. The capacitor C2 andthe output terminal S4 has therebetween a connecting point connected toa constant-voltage source V2 through a resistor R4.

Accordingly, an output level decreases as a resistance value of theresistance R5 increases, while the output level increases as theresistance value decreases. Meanwhile, a limiter level is varied bychanging the ratio of the resistors R1 and R2. That is, the limiterlevel increases with decrease in the resistance value of the resistorR1, while the limiter level decreases with increase in the resistancevalue. Due to this, an amplified signal containing an increased noisecomponent can be obtained by adjusting the registers R1, R2 and R5.

Meanwhile, the amplifier 18 is similarly structured to the limiteramplifiers 16 a-16 n, wherein an amplified signal free of limiting canbe obtained by considerably decreasing the value of the resistor R1.

Referring to FIG. 4 ,a noise reducing circuit 10 in another embodimentis same as the FIG. 1 embodiment except that a delay circuit 22 as afirst delay means is inserted between the amplifier 18 and thesubtracter 20 b, and the BPFs 12 a-12 n have a pass-band width as shownin FIG. 5(A), omitting duplicated explanations. The BPFs 12 a-12 n havea pass-band width corresponding to their own delay characteristics. Thatis, the delay time caused by extraction in the BPF increases withincrease in passing-frequency band provided that the pass-band width isthe same. Accordingly, if the pass-band width of the BPFs 12 a-12 n isbroadened with increase in the pass-frequency band as shown in FIG.5(A), the delay characteristic of the BPFs 12 a-12 n can be flattened asshown in FIG. 5(B).

On the other hand, the delay time of the delay circuit 22 b is set thatsuch that the luminance signal outputted from the amplifier 18 iscoincident in phase with the luminance signal component contained in theaddition signal outputted from the adder 20 a. This positively removesthe luminance signal component from the addition signal with a resultthat a luminance signal reduced of noise component is obtained throughthe output terminal S2.

Referring to FIG. 6, a noise reducing circuit in another embodiment issimilar to the FIG. 4 embodiment except that a plurality of BPFs 26 a-26n are inserted between the adder 20 a and the respective limiteramplifiers 16 a-16 n, omitting duplicated explanations. The BPFs 26 a-26n serve to remove of n-order higher harmonics occurring from the limiteramplifiers 16 a-16 n, because there is a fear of beat occurrence betweenn-order higher harmonics caused by the limiter amplifiers 16 a-16 n andn-order higher harmonics contained in any of the extracted signal. Alsoeach of the BPFs 26 a-26 n is wider in pass-band width than any of theBPFs 12 a-12 n. Consequently, there is no possibility of deviation indelay time between BPFs 26 a-26 n.

Referring to FIG. 7, a noise reducing circuit 10 in still anotherembodiment is similar to the FIG. 6 embodiment except that the BPF 26a-26 n are replaced by low-pass filters (LPF) 28 a-28 n. These LPFs 28a-28 n are also filters to remove the n-order higher harmonics caused bythe limiter amplifiers 16 a-16 n, which prevent beat from occurring. Therespective LPFs 28 a-28 n are same in cut-off frequency at a range lowerthan the higher harmonics. Thus, there is no possibility of deviation indelay characteristics between the LPFs 28 a-28 n.

Referring to FIG. 8, a noise reducing circuit 10 in still anotherembodiment is similar to the FIG. 4 embodiment except that the BPFs 12a-12 n have a pass-band width as shown in FIG. 9(A) and further anequalizer 30 is inserted between the BPFs 12 a-12 n and the inputterminal S1. The equalizer 30 causes the predetermined frequencycomponents extracted by the BPFs 12 a-12 n to deviate in phase by apredetermined amount. Since the BPFs 12 a-12 n are same in pass-bandwidth, there is tendency toward deviation of delay characteristic asshown in FIG. 9(B). However, the provision of the equalizer 30 brings,the predetermined frequency components outputted from the BPFs 12 a-12 ninto a same phase. Also, the BPFs 12 a-12 n may use elements common toone another, thus facilitating the design.

Referring to FIG. 10, a noise reducing circuit 10 in another embodimentis similar to the FIG. 8 embodiment except that the BPFs 26 a-26 nhaving used in the FIG. 6 embodiment are respectively inserted betweenthe limiter amplifiers 16 a-16 n and the adder 20 a. The noise reducingcircuit 10 thus structured can remove n-order higher harmonics caused bythe limiter amplifiers 16 a-16 n. Incidentally, the BPFs 26 a-26 n maybe replaced by the LPF 28 a-28 n used in the FIG. 7 embodiment, as shownin FIG. 11.

A noise reducing circuit 10 in an still another embodiment shown in FIG.12 is similar to the FIG. 8 embodiment except that the outputs oflimiter amplifiers 14 a-14 g are added by the adder 20 d and the outputsof the limiter amplifiers 14 h-14 n are added by an adder 20 e so thatthe outputs of the adders 20 d and 20 e are respectively inputted to BPF26 a-26 b, omitting duplicated explanation. The provision of the adders20 d and 20 e like this can greatly reduce the number of the BPF used toremove the n-order higher harmonics caused by the limiter amplifiers 14a-14 n. As shown in FIG. 13, the BPF 26 a and 26 b in the FIG. 12embodiment may be substituted by LPF 28 a and 28 b.

Referring to FIG. 14, a noise reducing circuit 10 in another embodimentis similar to the FIG. 1 embodiment except that the delay circuit 22 aand the subtracter 20 c are omitted, a luminance signal not containing alow frequency is inputted through the input terminal S1, the amplifier18 has a same amplification as the limiter amplifiers 16 a-16 n withoutlevel limitation different from the limiter amplifiers 16 a-16 n, andthe subtracter 20 b subtracts the output of the adder 20 a from theoutput of the amplifier 18. The limiter amplifiers 16 a-16 n has outputsthat are added 20 a so that the adder 20 a provides an addition signalamplifier and containing a suppressed luminance signal component and anamplified noise component, as shown in FIG. 15(A). From the amplifier18, an amplifier 18, an amplified signal as shown in FIG. 15(B) isobtained. The subtracter 20 a subtracts the amplified signal by theaddition signal to attenuate in level the subtraction signal, therebyobtaining a luminance signal reduced of a noise component through theoutput terminal S2.

Referring to FIG. 16, a noise reducing circuit 10 in a furtherembodiment is similar to the FIG. 14 embodiment except that the BPFs 12a-12 n have a pass-band width as shown in FIG. 17, the amplifier 18 has,at a front stage, an equalizer 32 a to deviate in phase the respectivepredetermined frequency components extracted by the BPFs 12 a-12 n, andthe subtracter 20 b has, at a rear stage, an equalizer 32 b to returnthe phase deviated by the equalizer 32 a. As understood from FIG. 17,the luminance signal supplied to the input terminal S1 decreases inlevel as the frequency increases, while the level of a noise containedin the luminance signal increases as the frequency increases.Consequently, if the pass-band width of the BPFs 12 a-12 n is narrowedas the pass-frequency range becomes higher, i.e. as the noise level atthe pass-band increases, the respective noise components obtainable fromthe BPFs 12 a-12 n are brought into almost a same level. The BPFs 12a-12 n have their outputs amplified by limiter amplifiers 16 a-16 n.Thereafter, the outputs of the limiter amplifiers 16 a-16 n are addedtogether by the adder 20 a.

On the other hand, in the equalizer 32, the predetermined frequencycomponents contained in the luminance signal and correspond topass-bands of the BPF 12 a-12 n are adjusted in phase corresponding tothe delay time caused by the BPF 12 a-12 n so that a predeterminedfrequency component adjusted in phase is supplied to the subtracter 20 bthrough the amplifier 18. Accordingly, the output of the adder 20 a issubtracted from the output of the amplifier 18 by the subtracter 20 b,thereby removing positively a noise component contained in the output ofthe amplifier 18. The output from the subtracter 20 b is supplied to theequalizer 32 b having a reverse characteristic to the equalizer 32 a,thereby correcting the deviations in phase of the predeterminedfrequency components. Incidentally, if the BPF 12 a-12 n are madenarrower in pass-band width as the pass frequency range becomes higher,the number of the BPFs can be reduced minimum.

Referring to FIG. 18, a noise reducing circuit 10 in another embodimentis similar to the FIG. 16 embodiment except that a BPF 12 p is addedthat has the same pass-band as the BPF 12 a and a level detector 34 fordetecting a level of an extracted signal extracted by the BPF 12 p, andthe limiter amplifiers 16 a-16 n are replaced by limiter amplifiers 16a′-16 n′ controllable by a detection signal supplied from the leveldetector 34. The extracted signal from the BPF 12 p is detected in levelby the level luminance signal inputted through the input terminal S1.Due to this, the limiter amplifiers 16 a′-16 n′ can be adjusted inlimiting level to optimal values.

FIG. 19 shows a structure of the level detector 34. An input terminal S5is connected through a diode D1 to a base of a transistor T3 that iscollector-grounded. A resistor R6 and a capacitor C3 are inserted inparallel between an output end of the diode D1 and the grounding. Aresistor R7 is inserted between an emitted of the transistor T3 and apower supply VCC, and an output terminal S6 is connected to a connectingpoint between the resistor R7 and the emitter of the transistor T3. Anextracted signal supplied from the BPF 12 p to the input terminal S5 issubjected to have-wave rectification by the diode D1, and thensmoothened by the resistor R6 and the capacitor C3. A smoothened voltageis supplied to the base of the transistor T3 so that a voltagecorresponding to the extracted signal is outputted as a detected signalthrough the output terminal S6.

The limiter amplifiers 16 a′-16 n′ have a gain control circuit 36 addedbetween an input terminal S3 and a capacitor C1, as compared with thelimiter amplifiers 16 a-16 n. This gain control circuit 36 is structuredas shown in FIG. 21. An input terminal S7 is connected through acapacitor C4 to a base of a transistor T4 forming a differential pair38. The base of the transistor T4 is also connected to a base of atransistor T5 through resistors R8 and R9, while the resistors R8 and R9have therebetween a connecting point connected to a constant-voltagesource V3. The transistor T4 has a collector connected to a power supplyVCC through a resistor R11, while the transistor T5 has a collectorconnected to the power supply VCC through a resistor R12.

The collector of the transistor T5 is also connected to a base of atransistor T8 having a collector connected to the power supply VCC andan emitter being grounded through a resistor R10, wherein the emitter ofthe transistor T8 is connected to an output terminal S8. A connectingpoint between respective emitters of the transistor T4 and thetransistor T5 is connected to collectors of transistors T6 and T7included in a constant-current source 40, wherein the transistor T6 andthe transistor T7 are grounded at their emitters. The transistor T6 hasa base connected to a constant-voltage source V2, while the transistorT7 has a base connected to an input terminal S9 to receive a detectedsignal supplied from the level detector 34.

The constant-voltage source 40 is controlled in current amount by alevel of a detected signal supplied from the level detector 34. That is,a total amount of an emitter current through the transistor T4 and anemitter current through the transistor T5 is determined by the detectedsignal, and the gain control circuit 36 is given a gain corresponding toa level of the detected signal. Therefore, if the detected signal has ahigh level, the limiter amplifiers 16 a′-16 n′ become high in limitinglevel, while if the detected signal is low in level, the limiteramplifiers 16 a′-16 n′ become low in limiting level.

Referring to FIG. 22, a noise reducing circuit 10 in another embodimentis similar to the FIG. 18 embodiment except that the BPF 12 p isreplaced by an LPF 42 having a pass-band set lower than that of the BPF12 n, and the level detector 34 controls the limiter amplifiers 16 a′-16n′ based on an extracted signal extracted by the LPF 42. With thisstructure, the limiter amplifiers 16 a′-16 n′ can be set in limitinglevel at optimal values.

Referring to FIG. 23, a noise reducing circuit 10 in a still anotherembodiment includes an input terminal S11 to receive an luminance signalreproduced by a VTR (not shown). This luminance signal is supplied toBPF 44 a-44 n connected in parallel with each other and having apass-band width broadened as the pass frequency range becomes higher sothat predetermined frequency components are respectively extracted. TheBPF 44 a-44 n are respectively connected with amplifiers 46 a-46 n sothat extracted signals extracted by the BPF 44 a-44 n are amplified bythem.

The amplifiers 46 a-46 n have an amplifying characteristic, as shown inFIG. 25, that when an input level in absolute value exceeds apredetermined value, a gain suddenly increases in positive and negativedirections. Consequently, if an adjustment is made for a range having again of 0, amplification is made only for a luminance signal componentcontained in the extracted signal inputted, thereby removing a noisecomponent. Incidentally, the amplifiers 46 a-46 n are same in amplifyingcharacteristic. The respective amplified signals from the amplifiers 46a-46 n are added together by an adder 48 so that an addition signal,i.e. a luminance signal reduced of a noise component, is outputtedthrough an output terminal S12.

The amplifiers 46 a-46 n are structured as shown in FIG. 24, That is, aninput signal supplied through an input terminal S13 is inputted toa+terminal of an operational amplifier 50 a through a capacitor C5 sothat the operational amplifier 50 a has an output to a+terminal of anoperational amplifier 50 b. The output of the operational amplifier 50 bis divided by resistors R15 and R14 so that a terminal voltage of theresistor R14 is negatively fed back to an−terminal of the operationalamplifier 50 a. When the potential of a point a is smaller than aforward drop voltage Vf across diodes D2 and D3, the diodes D2 and D3become non-conductive and nothing is outputted through an outputterminal S14. However, where the potential of the point A is greaterthan the forward drop voltage Vf, any one of the diodes D2 and D3 isconductive. Accordingly, an amplified signal of approximately(R14+R15)/R14 times the input signal is obtained through an outputterminal S14. Therefore, there is no amplification for a signal having alow level of a noise component, specifically a signal not greater than(R14+R15)×Vf as shown in FIG. 25. A signal having a greater noisecomponent is amplified by (R14+R15)/R14 times and outputted.Incidentally, the amplifiers 46 a-46 n may be structured as shown inFIG. 26. According to FIG. 26, an input terminal S15 is connectedthrough a capacitor C6 and a resistor R17 to a base of a transistor T9forming a differential pair 52. Also, the transistor T9 has a baseconnected through resistors R18 and R21 to a base of a transistor T10.The resistors R18 and R21 have therebetween a connecting point connectedto a constant-voltage source V4. The transistor T9 has a collectorconnected to a power supply VCC, and an emitter connected through adiode D4 and a resistor R19 to an emitter of the transistor T10. Thediode D5 is directed in a reverse direction to the diode D4 andconnected in parallel with the diode. The emitter of the transistor T9is also connected to a constant current source I2, while the emitter ofthe transistor T10 is connected to a constant-current source I3. Thetransistor T10 has a collector connected through a resistor R20 to thepower supply VCC and directly to an output terminal S16.

When the terminal voltage of the diodes D4 and D5 is lower than theforward drop voltage Vf of the diodes D4 and D5, the diodes D4 and D5are not conductive and hence the differential pair 52 is not operativeso that nothing is outputted through an output terminal S16. On theother hand, if the terminal voltage of the diodes D4 and D5 is greaterthan the forward drop voltage Vf, the diodes D4 and D5 are conductiveand the differential pair 52 is operative so that an amplified signal isobtainable through the output terminal S16. Here, where a noisecomponent only or the like is inputted through the input terminal S15,the diodes D4 and D5 are not conductive and the differential pair isinoperative. Therefore, an amplified signal reduced of a noise componentis outputted through the output terminal 36.

Referring to FIG. 27, a noise reducing circuit 10 in another embodimentis similar to the FIG. 23 embodiment except that the BPF 44 a-44 n havea same pass-band width, and APFs (all-pass filters) 50 a-50 n areindividually inserted respectively between the BPFs 44 a-44 n and theamplifiers 46 a-46 n, omitting duplicated explanations. Due to the samepass-band width of the BPFs 44 a-44 n, the respective BPFs have delaycharacteristics different from one another as shown in FIG. 9(B).Accordingly, the APFs 50 a-50 n are provided in order to match the phaseof the extracted signals from the BPFs 44 a-44 n. This makes it possibleto obtain a luminance signal free of phase deviation from an adder 48.

Referring to FIG. 28, a noise reducing circuit 10 in another embodimentis similar to the FIG. 23 embodiment except that an equalizer 52 isinserted between the adder 48 and the output terminal S12. Thisequalizer 52 is to collect deviation in phase for respective extractedsignals outputted from the BPF 44 a-44 n . This makes it possible tocreate a luminance signal with high fidelity.

Referring to FIG. 29, a noise reducing circuit 10 in still anotherembodiment is similar to the FIG. 28 embodiment except that an HPF 54 isinserted between the BPF 44 a-44 g and the input terminal S11, and a LPF56 is inserted between the BPFs 44 h-44 n and the input terminal S11.The HPF 54 has a pass band covering a pass band for the BPF 44 a-44 g,while the LPF 56 has a pass band covering pass-bands of the BPFs 44 h-44n. The band range is divided by the HPF 54 and the LPF 56 in thismanner. Accordingly, even when inputting a luminance signal having abroader band than a dynamic range of the transistors forming the BPF 44a-44 n, there is no possibility that the transistor is saturated.

Referring to FIG. 30, a noise reducing circuit 10 in another embodimentis similar to the FIG. 23 embodiment except that BPFs 58 a-58 n areindividually inserted between the respective amplifiers 46 a-46 n andthe adder 48. The BPFs 58 a-58 n are filters to remove higher harmonicscaused by the limiters 46 a-46 n. Thus a luminance signal free of bothnoise and higher harmonics is obtainable from the adder 48.Incidentally, it is possible to remove higher harmonics by providingLPFs 60 a-60 n in place of the BPFs 58 a-58 n, as in a noise reducingcircuit 10 shown in FIG. 31.

Referring to FIG. 32, a noise reducing circuit 10 in a furtherembodiment is similar to the FIG. 28 embodiment except that theamplifiers 46 a-46 n have different characteristics from one another,and an LPF 62 having a lower pass-frequency range band than the BPF 44 nand an amplifier 64 are inserted between the input terminal S11 and theadder 48. As shown in FIG. 34, the luminance signal given to the inputterminal S11 has a characteristic that decreases in level as thefrequency becomes higher. The noise contained in this luminance signalhas a characteristic that increases in level as the frequency becomeshigher. Due to this, the extracted signal extracted from the BPFs has anoise component increasing in a direction from the BPF 44 n to the BPF44 a. This is, although the noise component is considerably low ascompared with the level of a video signal, the noise component extractedby the BPF 44 a or 44 b is greater than the noise component extracted bythe BPF 44 n or LPF 62.

Due to this, the range in which the gain possessed by the amplifiers 46a-46 n and 64 assumes 0 or the slight, corresponds to a noise component,i.e. a noise level, to be extracted. That is, the range of a gain of 0set in the amplifier becomes broader in a direction form the amplifier64 to amplifier 46 a. Accordingly, although the amplifiers 46 a and 46 bare given much noise, only the luminance signal is amplified withoutamplifying the noise. This enables noise to be fully reduced.

Referring to FIG. 35, a noise reducing circuit in another embodiment issimilar to the FIG. 32 embodiment except that the BPFs 44 a-44 n and theLPF 62 have pass bands as shown in FIG. 36 and FIG. 37. The BPFs 44 a-44n and the LPF 62 are different in pass-band width from one another,wherein the pass band width becomes narrower as the pass-frequency rangebecomes higher, i.e. in a direction from the LPF 62 to the BPF 44 a. Inother words, the pass-band width becomes narrower with increase in noiselevel in the pass band. The narrowing of the pass-band width at higherrange in this manner can improve the higher-range S/N for the extractedsignal by the BPF, as understood from FIG. 37. Accordingly, the noisegiven to the amplifiers 46 a and 46 b is reduced. It is possible topositively reduce the noise in concert with the characteristics ofamplifiers 46 a-46 n and 64, correspondingly to the noise level.

Referring to FIG. 38, a noise reducing circuit 10 in another embodimentis similar to the FIG. 32 embodiment except that there are added thereina BPF 44 p having the same pass band as the BPF 44 a and a leveldetector 66 to detect a level of an extracted signal extracted by theBPF 44 p, and the amplifiers 46 a-46 n and 64 are same in characteristicso that the characteristic is controlled by a detected signal by thelevel detector 66. The characteristic of the amplifier 46 a-46 n or 64is switched between characteristic lines a—a′, b—b′, c—c′, d—c′, e—e′and f—f′. Since the luminance signal given to the input terminal S11 andthe noise contained therein have a characteristic as shown in FIG. 34,it is possible to presume at what level the luminance signal and thenoise reside, by detecting a level of an extracted signal by the BPF 44.This makes possible to set the characteristics of the amplifiers 46 a-46n and 64 at optimal values. Due to this, a video signal fully reduced ofnoise can be obtained from the adder 48.

The amplifiers 46 a-46 n and 64, as understood from FIG. 40, are similarto the amplifiers 46 a-46 n shown in FIG. 24 except that a gain controlcircuit 66 is inserted between the input terminal S13 and a capacitorC5. Also, the gain control circuit 66 is similarly structured to thegain control circuit 36 shown in FIG. 21.

Incidentally, the amplifiers 46 a-46 n and 64 may use those shown inFIG. 41. These amplifiers 46 a-46 n and 64 are the same as theamplifiers 46 a-46 n excepting that the gain control circuit 66 isinserted between the input terminal S15 and the capacitor C6, omittingduplicated explanations.

Incidentally, the level of an extracted signal by the LPF 62 may bedetected by the level detector 66 as shown in FIG. 42 so that theamplifiers 46 a-46 n are controlled in characteristic by the detectedsignal.

Although the present invention has been described and illustrated indetail, it is clearly understood that the same is by way of illustrationand example only and is not to be taken by way of limitation, the spiritand scope of the present invention being limited only by the terms ofthe appended claims.

What is claimed is:
 1. A noise reducing circuit comprising: a firstsignal path for receiving an input signal and outputting a noisecomponent contained in the input signal; a second signal path forreceiving the input signal and outputting a first correlating signalcorrelating to the input signal; and a first calculating means forcalculating the noise component outputted from said first signal pathand the input signal to reduce noise, wherein said first signal pathincludes a plurality of bandpass filters for extracting a plurality offirst predetermined frequency components contained in the input signal,a plurality of limiters for individually receiving outputs of saidbandpass filters, and a first creating means for creating the noisecomponent based on outputs of said limiters, wherein said first creatingmeans includes a second correlating signal creating means for creating asecond correlating signal correlating to the input signal, and a secondcalculating means for subtracting the second correlating signal at leastfrom second predetermined frequency components in the outputs of saidlimiters, and wherein said second calculating means includes a firstadding means for adding the second predetermined frequency componentstogether, and a first subtracting means for subtracting the secondcorrelating signal from a first additional signal outputting from saidfirst adding means.
 2. A noise reducing circuit according to claim 1,further comprising a higher-harmonics removing means for removing higherharmonics from the outputs of said limiters.
 3. A noise reducing circuitaccording to claim 2, wherein said higher-harmonic removing meansincludes a plurality of filters for individually receiving the outputsof said limiters and removing the high harmonics.
 4. A noise reducingcircuit according to claim 2, wherein said high-harmonic removing meansincludes a second adding means for adding parts of the outputs of saidlimiters together, a third adding means for adding other parts of theoutputs of said limiters, a first filter for removing higher harmonicscontained in a second addition signal outputting from said second addingmeans, and a second filter for removing higher harmonics contained in athird addition signal outputted from said third adding means.
 5. A noisereducing circuit according to claim 1, wherein said bandpass filtershave the same pass-band width, said first signal path further includinga phase adjusting means for adjusting in phase the first predeterminedfrequency components.
 6. A noise reducing circuit according to claim 5,wherein said phase adjusting means adjusts the phase depending uponrespective delay characteristics of said bandpass filters.
 7. A noisereducing circuit according to claim 1, wherein said second correlatingsignal creating means includes a level adjusting means for adjusting alevel of a third predetermined frequency component contained in theinput signal and creating the second correlating signal having apredetermined relation in level to limiting levels of said limiters. 8.A noise reducing circuit according to claim 7, wherein said secondcreating means further includes a first delay means for matching inphase the second correlating signal created by said adjusting means to aphase of the second predetermined frequency component.
 9. A noisereducing circuit according to claim 8, wherein said second signal pathincludes a second delay means for matching the phase of the input signalto a phase of the noise component outputted from said first subtractingmeans.
 10. A noise reducing circuit according to claim 1, wherein saidfirst calculating means includes a second subtracting means forsubtracting the noise component from the input signal.
 11. A noisereducing circuit according to claim 1, wherein said first creating meansincludes an adding means for adding the output of limiters together tocreate the noise component, said second path including a filter forextracting the second predetermined frequency components of the inputsignal, and said first calculating means receiving the secondpredetermined frequency components of the input signal as the firstcorrelating signal and subtracting the noise component from the firstcorrelating signal.
 12. A noise reducing circuit according to claim 1,wherein said second-pass filters each have a narrower pass-band width asa noise component level in the pass band becomes greater.
 13. A noisereducing circuit according to claim 12, wherein said limiters have asame limiting characteristic.
 14. A noise reducing circuit according toclaim 13, further comprising a control means for controllingcharacteristics of limiters in response to a level of the input signal.15. A noise reducing circuit according to claim 14, wherein said controlmeans includes a first for extracting the second predetermined frequencycomponents of the input signal, and a control signal creating means forcreating a control signal for said limiters depending upon an output ofsaid filter.
 16. A noise reducing circuit according to any of claim 12to 15, wherein said second signal path includes a first phase adjustingmeans for adjusting respective phases of the first predeterminedfrequency components contained in the input signal, and said firstcalculating means receiving the input signal adjusted in phase as thefirst correlating signal.
 17. A noise reducing circuit according toclaim 16, wherein said first phase adjusting means adjusts the phasesdepending upon respective delay characteristics of said bandpassfilters.
 18. A noise reducing circuit according to claim 16, furthercomprising a second phase adjusting means for returning back deviationsof the phases of the first predetermined frequency components containedin the output of said first calculating means.
 19. A noise reducingcircuit comprising: a first signal path for receiving an input signaland outputting a noise component contained in the input signal; a secondsignal path for receiving the input signal and outputting a firstcorrelating signal correlating to the input signal; and a firstcalculating means for calculating the noise component outputted fromsaid first signal path and the input signal to reduce noise, whereinsaid first signal path includes a plurality of bandpass filters forextracting a plurality of first predetermined frequency componentscontained in the input signal, a plurality of limiters for individuallyreceiving outputs of said bandpass filters, and a first creating meansfor creating the noise component based on outputs of said limiters, andwherein said bandpass filters each have a pass-band width broadened asthe pass-frequency band becomes higher.